Boston, MA

Christopher Pacejo

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I am a…

  • detail‐oriented engineer, attentive to the big picture
  • creative architect, attentive to the practical
  • believer in robust and accessible system design
  • student of both theory and practice

Ask me to share more about…

  • proving correctness of distributed algorithms running on eventually consistent storage
  • developing an X.509 PKI in PostgreSQL
  • analyzing linear checksums for strength, orthogonality, and uniformity
  • my home network configuration
  • developing competitive AIs to play my two favorite board games

My peers seek my help with…

  • designing and evaluating concurrent algorithms
  • structuring relational data for maintainability and performance
  • resolving semantic mismatches at the root of architectural issues
  • understanding unfamiliar systems and languages
  • eliminating performance bottlenecks in both CPU‐bound and I/O‐bound code paths

My employers ask me to…

  • lead groups in design and specification of new systems
  • empower peers by giving accessible and informative presentations on complex topics
  • evaluate and propose and implement solutions to system‐wide architectural issues
  • eliminate complexity from and improve reliability of problematic codebases
  • acquire and institutionalize deep knowledge of unfamiliar codebases

Experience

ClearSky Data (Boston, MA)
Consulting Engineer (–)
Principal Software Engineer ()
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EMC/XtremIO (Hopkinton, MA)
Senior Software Engineer
designed networking strategy for data replication
developed protocol for configuration synchronization within replicating pair
investigated, documented, and normalized locking conventions used in management plane
Corero Network Security (Hudson, MA)
Software Engineer
designed and implemented system to generate inter‐process communication layer and resource assignments for multicore processor from interface definitions (US Patent 9,442,782)
developed 40 Gbps network packet classifier and queueing system
designed and implemented 20 Gbps packet capture and indexing application
developed instruction scheduler for VLIW processor
Brown University (Providence, RI)
Research Assistant, Computer Science department
co‐taught graduate course on reduction semantics
Worcester Polytechnic Institute (Worcester, MA)
Teaching Assistant, Computer Science department
Allegro Microsystems (Worcester, MA)
Maxtor Corporation (Shrewsbury, MA)
MetLife (Warwick, RI)

Education

Brown University (Providence, RI)
Ph. D. candidate, Computer Science
Worcester Polytechnic Institute (Worcester, MA)
M. S., Computer Science (2008)
B. S., Electrical & Computer Engineering (2006)